A magnetic recording read channel converts an analog read channel into an estimate of the user data recorded on a magnetic medium. Read heads and magnetic media introduce noise and other distortions into the read signal. As the information densities in magnetic recording increase, the intersymbol interference (ISI) becomes more severe as well. In read channel chips, a Viterbi detector is typically used to detect the read data bits in the presence of intersymbol interference and noise.
Data detection is often performed using maximum likelihood sequence estimation (MLSE), to produce the output symbols or bits A maximum likelihood sequence estimator considers all possible sequences and determines which sequence was actually transmitted, in a known manner. The Viterbi algorithm is an efficient implementation of MLSE. For a more detailed discussion of a Viterbi implementation of a maximum likelihood sequence estimator, see Gerhard Fettweis and Heinrich Meyr, “High-Speed Parallel Viterbi Decoding Algorithm and VLSI-Architecture,” IEEE Communication Magazine (May 1991), incorporated by reference herein. The computation and storage requirements of the Viterbi algorithm are proportional to the number of states and the number of states grows exponentially with the channel memory.
A number of applications require a soft decision, which indicates a reliability value for each detected bit. The Soft Output Viterbi Algorithm (SOVA) is a well known technique for generating soft decisions. The SOVA combines the Viterbi algorithm with additional processing steps to compute soft decisions. These soft decisions can be used by an outer detector to improve the error rate performance of the overall system. For a more detailed discussion of SOVA detectors, see, for example, the above-referenced U.S. patent application Ser. No. 11/045,585 or J. Hagenauer and P. Hoeher, “A Viterbi Algorithm with Soft-decision Outputs and its Applications,” IEEE Global Telecommunications Conference (GLOBECOM), vol. 3, 1680-1686 (November 1989). In general, the complexity of a SOVA detector is more complex than a Viterbi detector for the same number of trellis states.
Existing sequence or Viterbi detectors can be replaced by SOVA detectors for the same number of trellis states to provide soft decisions with each detected bit by employing a full-state SOVA detector. The full-state SOVA detector processes the same number of states as the existing sequence detector. It has been found, however, that such an approach requires a prohibitive amount of area and power. For example, if an existing sequence detector processes 32 states, replacing it with a 32-state SOVA sequence detector requires a large amount of chip area and leads to a chip with significant power consumption. Also, such a replacement requires a significant amount of design time. A need therefore exists for soft output Viterbi detection techniques with reduced hardware complexity and reduced design time.